The SRM Z208 is a high-speed rotary-style IC test handler developed by the Malaysian company SRM—headquartered in Penang and specializing in the manufacturing of high-speed IC test handling equipment. It is widely used in the back-end semiconductor manufacturing process for final device testing. The system accepts components via mechanisms such as vibratory bowls or tubes, picks them up individually, and transports them to test sockets for electrical performance verification. Integrated with a vision inspection system to detect external defects, the unit automatically sorts components into "pass" or "fail" categories based on test results, ultimately outputting them in formats such as tape-and-reel.
The Z208 utilizes a rotary (turret-style) architecture, with both the rotary axis and the Z-axis powered by highly durable direct-drive motors. This design ensures high speed, low vibration, and precise control. Furthermore, the system supports multi-station parallel testing, which significantly boosts throughput. Its vision inspection system—capable of 2D/3D imaging, inspection of pins and bottom-side pads, and six-sided external examination—meets the rigorous inspection requirements for small-form-factor packages, including MLP and QFN types (such as 1.0 × 0.6 mm MLP). II. Key Parameters
Table 1: Summary of Key Parameters
Item Parameter
Equipment Type High-speed Turret-style IC Test Handler
Manufacturer SRM (Penang, Malaysia)
Feeding Method Bowl Feeder, Tube, etc.
Output Method Tape & Reel, etc.
Compatible Packages Small-form-factor packages such as MLP and QFN (e.g., 1.0 × 0.6 mm MLP)
Test Stations Supports multi-station parallel testing (up to 16 stations for the turret series)
Visual Inspection 2D/3D vision, pin and bottom-pad inspection, and six-sided external inspection
Test Force Adjustable from 0.3 to 3 kg (up to ~9 kg optional for the turret series)
Throughput High-speed turret-based sorting; UPH (units per hour) varies by package type (up to ~40,000 units/hour for the series)
Typical Application Testing and sorting of finished semiconductor devices (small-form-factor packages like MLP and QFN)
